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| TECHNICAL DATA IW4052B Analog Multiplexer Demultiplexer High-Performance Silicon-Gate CMOS The IW4052B analog multiplexer/demultiplexer is digitally controlled analog switches having low ON impedance and very low OFF leakage current. Control of analog signals up to 20V peak-topeak can be achieved by digital signal amplitudes of 4.5 to 20V (if VCC - GND = 3V, a VCC - VEE of up to 13 V can be controlled; for VCC VEE level differences above 13V a VCC - GND of at least 4.5V is required). These multiplexer circuits dissipate extremely low quiescent power over the full VCC -GND and VCC - VEE supply-voltage ranges, independent of the logic state of the control signals. When a logic "1"is present at the ENABLE input terminal all channels are off. The IW4052 is a differential 4-channel multiplexer having two binary control inputs. A and B, and an enable input. The two binary input signals select 1 of 4 pairs of channels to turned on and connect the analog inputs to the outputs. * Operating Voltage Range: 3.0 to 18 V * Maximum input current of 1 A at 18 V over full package-temperature range; 100 nA at 18 V and 25C * Noise margin (over full package temperature range): 1.0 V min @ 5.0 V supply 2.0 V min @ 10.0 V supply 2.5 V min @ 15.0 V supply ORDERING INFORMATION IW4052BN Plastic IW4052BDW SOIC TA = -55 to 125 C for all packages PIN ASSIGNMENT LOGIC DIAGRAM Double-Pole, 4-Position Plus Common Off FUNCTION TABLE Control Inputs Enable B L L L L PIN 16 =VCC PIN 7 = VEE PIN 8 = GND L L H H Select A L H L H X Y0 Y1 Y2 Y3 X0 X1 X2 X3 None ON Channels H X X = don't care 103 IW4052B MAXIMUM RATINGS* Symbol VCC VIN VOUT IIN PD PD Tstg TL * Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage (Referenced to GND) DC Output Voltage (Referenced to GND) DC Input Current, per Pin Power Dissipation in Still Air, Plastic DIP+ SOIC Package+ Power Dissipation per Output Transistor Storage Temperature Lead Temperature, 1 mm from Case for 10 Seconds (Plastic DIP or SOIC Package) Value -0.5 to +20 -0.5 to VCC +0.5 -0.5 to VCC +0.5 10 750 500 100 -65 to +150 260 Unit V V V mA mW mW C C Maximum Ratings are those values beyond which damage to the device may occur. Functional operation should be restricted to the Recommended Operating Conditions. +Derating - Plastic DIP: - 10 mW/C from 65 to 125C SOIC Package: : - 7 mW/C from 65 to 125C RECOMMENDED OPERATING CONDITIONS Symbol VCC VIN, VOUT TA I ROH * Parameter DC Supply Voltage (Referenced to GND) DC Input Voltage, Output Voltage (Referenced to GND) Operating Temperature, All Package Types Multiplexer Switch Input Current Capability Output Load Resistance * Min 3.0 0 -55 100 Max 18 VCC +125 25 - Unit V V C mA In certain applications, the external load-resistor current may include both VCC and signal-line components. This device contains protection circuitry to guard against damage due to high static voltages or electric fields. However, precautions must be taken to avoid applications of any voltage higher than maximum rated voltages to this high-impedance circuit. For proper operation, VIN and VOUT should be constrained to the range GND(VIN or VOUT)VCC. Unused digital pins must be tied to an appropriate logic voltage level (e.g., either GND or VCC). Unused Analog I/O pins may be left open or terminated. 104 IW4052B DC ELECTRICAL CHARACTERISTICS Digital Section VCC Symbol VIH Parameter Minimum High-Level Input Voltage, Channel-Select or Enable Inputs Maximum Low -Level Input Voltage, Channel-Select or Enable Inputs Maximum Input Leakage Current, Channel-Select or Enable Inputs Maximum Quiescent Supply Current (per Package) Test Conditions VIS=VCC thru 1k VEE=GND IIS<2A on all OFF Chanels RL=1k to GND VIS=VCC thru 1k VEE=GND IIS<2A on all OFF Chanels RL=1k to GND VIN=VCC or GND V 5 10 15 5 10 15 18 Guaranteed Limit -55 C 3.5 7 11 1.5 3 4 0.1 25 C 3.5 7 11 1.5 3 4 0.1 125 C 3.5 7 12 1.4 3 4 1.0 Unit V VIL V IIN A ICC Channel Select = VCC or GND 5 10 15 20 5 10 20 100 5 10 20 100 150 300 600 3000 A DC ELECTRICAL CHARACTERISTICS Analog Section VCC Symbol RON Parameter Maximum "ON" Resistance Test Conditions VEE=GND=0 VIS = GND to VCC VEE=GND=0 V 5 10 15 5 10 15 18 Guaranteed Limit -55 C 800 310 200 100 25 C 1050 400 240 10 15 5 100 125 C 1300 550 320 1000 Unit RON Maximum Difference in "ON" Resistance Between Any Two Channels in the Same Package Maximum Off- Channel Leakage Current, Any One Channel Maximum Off- Channel Leakage Current, Common Channel IOFF VEE=GND=0 nA VEE=GND=0 18 100 100 1000 105 IW4052B AC ELECTRICAL CHARACTERISTICS(CL=50pF,Input tr=tf=20.0 ns) VCC Symbol tPLH, tPHL Parameter Maximum Propagation Delay , Analog Input to Analog Output (Figure 1) RL=200k Maximum Propagation Delay , Address to Analog Output (Figure 2) RL=10k VEE=GND=0 VEE=-5V tPLZ, tPZL Maximum Propagation Delay, Enable to Analog Output (Figure 2) RL=10k VEE=GND=0 VEE=-10V tPHZ, tPZH Maximum Propagation Delay, Enable to Analog Output (Figure 2) RL=10k VEE=GND=0 VEE=-10V CIN CI/O Maximum Input Capacitance, Channel-Select or Enable Inputs Maximum Capacitance VEE=GND=-5V CIS COS Feedthrough CIOS V 5 10 15 5 10 15 5 5 10 15 5 5 10 15 5 Guaranteed Limit -55 C 60 30 20 720 320 240 450 720 320 240 400 450 210 160 300 7.5 25 C 60 30 20 720 320 240 450 720 320 240 400 450 210 160 300 7.5 125 C 120 60 40 1440 640 480 900 1440 640 480 800 900 420 320 600 7.5 pF ns ns Unit ns tPLZ, tPHZ ns 5 5 5 - 5 18 0.2 - pF 106 IW4052B ADDITIONAL APPLICATION CHARACTERISTICS VCC Symbol BW Parameter Maximum OnChannel Bandwidth or Minimum Frequency Response (-3db) (-40db) Feedthrough Frequency (All Channels OFF) (-40db) Signal Crosstalk Frequency Test Conditions VEE=GND RL=1k 20 log(VOS/VIS)=-3db 10 VOS at Common OUT/IN VOS at Any Channel VEE=GND RL=1k 20 log(VOS/VIS)=-40db VOS at Common OUT/IN VOS at Any Channel VEE=GND RL=1k 20 log(VOS/VIS)=-40db Between Sections : Measured on Common Measured on Any Chanel VEE=GND fIS=1kHz sine wave VEE=GND RL=10k** tr,tf=20ns Square Wave 5 10 15 10 2* 3* 5* 10 5* 60 V VIS V Limit* 25 C Unit 5* 25 MHz 10 10 5* 5* 10 8 6 10 0.3 0.2 012 65 % THD Total Harmonic Distortion Address-or Enable to Signal Crosstalk - mv (peak) * Peak-to-peak voltage symmetrical about (VDD-VEE)/2 ** Both ends of channel 107 IW4052B Figure 1. Switching Waveforms Figure 2. Switching Waveforms EXPANDED LOGIC DIAGRAM 108 |
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